1. Field of the Invention
The present invention relates to digital computers. More specifically, the present invention is directed to a monitoring and restart circuit for a digital computer's central processing unit (CPU).
2. Description of the Prior Art
A digital computer may unintentionally stop executing instructions due to a power line transient signal or other external disturbance causing the computer to incorrectly interpret an instruction as a "halt" instruction or causing the program counter to advance, or jump, and produce an address for an area of memory where the program being executed is not stored. Additionally, a loss of power may cause the digital computer to stop operating. On the other hand, a digital computer may stop itself for a valid reason, such as when a self-diagnostic routine fails. In order to differentiate between a valid stoppage of the computer and an erroneous or invalid stoppage it is necessary to apply a known operational state to the computer to induce a response which can be checked against the normal operation of the computer. Since the digital computer particularly in a process control application may be in an unattended location, it is desirable to have a monitoring and restart operation available for automatic and immediate use in the event of a computer outage. In the event of a transient stoppage of the computer, such an automatic restart will enable a process control computer to continue its control function while obviating the need for an operator to visit the computer site.